Well, then, it comes full circle then, as my task is to finish the EF2 cart layout. I did not know it had the required capability.

Off to finish it then, I am.

Jim

brain: You don't need to do anything for the EF2. I discontinued the design a while ago already because I'm not satisfied with it. The external kernal I implemented in the EF2 was not 100% cleanly designed in the lack of a suitable clock source and a separate clock domain. As written in the EF thread I've some ideas for the EF3 already, but who knows when it will come.
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Well, if skoe shares the work perhaps someone can come up with something.


I guess one wire to solder in would be easier than desoldering an entire chip, so I guess that could be a solution if it can't be solved any other way.

Nice, EF2 speak and then EF3 Speak... Excellent. I'll be looking forward to those.
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So the Chameleon should be able to do that then... maybe it already does?

The 1541U-II could perhaps do it as well as it has a FPGA which could be programmed with 6510 core.


It may mean more sold JiffyDOS as well.

I just meant that the future Chameleon users may be able to do just this, not that the Chameleon was supposed to be the only mean of getting this.

Just to make sure nobody got confused about EF2, EF3 and External Kernal: About a year ago I made a prototype of an EF2, it had several new features. I asked Jim if he wants to make an updated design from this prototype and sell it in his shop. This didn't happen because Jim didn't have enough time.

After a while I recognized that the design of the EF2 reached its limits already and that there are some other concepts which could make it cheaper _and_ more flexible. That's what I call EF3. There is no prototype for this one yet. And I'm not going to start the development in near future, because there's still much potential in the current EasyFlash (software updates, patches for software to make it run on EF etc.).

The EF3 will contain an external kernal that does it like described in this thread (without cable). I did not plan to make a stand-alone external kernal cartridge. But the bounty could be a motivation to add a simple kernal cartridge to my todo-list. And if it is additionally useful for somebody else, e.g. for Jim's Jiffy distribution, I'd like to do it. Especially it's a challenge to do it with cheap electronic parts.

Hopefully this clarifies some confusion about my statements.
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As long as the EF3 can use the EasyFlash .crt images it's cool, or all that work is lost with conversions and so.

If you smack an FPGA on a cart for a 6510 core emulation to work as a kernal replacement I'm sure there would be room in the FPGA for other things as well.

OT: EasyFlash-compatibility will be on #1 on the priority list The EasyFlash software and documentation for programmers contain measures already to provide compatibility for different Flash ROM types.
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I have drafted bounty terms and posted them at Commodore Bounty Forum.

http://www.commodorebounty.com...tart=6#171

Please review and feel free to critique. Once the language is agreed upon, I will start the bounty.

A bounty has been started, please spread the word.

http://commodorebounty.com/ind...;Itemid=37

k, I'm in.

Jim

Has anyone ever done an internal reprogrammable kernal?

I'm thinking a second chip that can be accessed and reprogrammed from the C64 like described for the kernal cart? Internal flash kernal?

I got an answer from Mr Ruud Baltissen, he thought his design should work and I got a link to the published article from a German magazine:

http://www.baltissen.org/files/extkernal.pdf

He said he hadn't tried it himself as he swapped them internally instead when needed.

If you have to choose between building this yourself or just swap roms in the C64, the latter is easier I guess. If you could buy the cart and plug it in, that would be easiest though.

Did anyone mention why this design would not work, I scrolled through the posts but couldn't find anything. Yes, that's right, not being able to use the ram...

I'm not that good at German, it will take me a while to read it through an I won't understand everything anyway.

It does say in one header though "Important: Access to the RAM below the ROM!"

The construction seems to be a lot more than just a kernal replacement though.


I've read some more and it appears you are supposed to be able to use the RAM at the ROM address with this design as well as using the tape. You can have four different ROM kernals or three ROMs and one SRAM that can be loaded up from disk drive and then write protected. A battery backup is also planned for.

I almost feel like building it just to try...

Apparently there was also a single kernal rom circuitboard and a version for the C128 available at the supplier Garnet Weiss in München.

Ok, but if the theory of operation is OK then perhaps these things can be better implemented in more modern hardware?

Or is there something in its design that will not work?

Eprom PLA users have themselves to blaim if it doesn't work.